BIOS Release Notes - Revision history

Administrator at 20:54, 14 December 2015

2015-12-14T20:54:52Z

Administrator at 19:57, 16 June 2015

2015-06-16T19:57:58Z

Show changes

Administrator at 20:06, 10 June 2015

2015-06-10T20:06:25Z

Administrator at 18:14, 10 June 2015

2015-06-10T18:14:50Z

Administrator at 13:00, 7 June 2015

2015-06-07T13:00:20Z

Administrator at 12:59, 7 June 2015

2015-06-07T12:59:34Z

Administrator at 12:54, 7 June 2015

2015-06-07T12:54:16Z

Administrator at 12:53, 7 June 2015

2015-06-07T12:53:25Z

Administrator at 12:34, 7 June 2015

2015-06-07T12:34:59Z

Administrator: Created page with "== Napalm (Voodoo4 / Voodoo5) == * Initial Version of Napalm BIOS. * Based on the Avenger BIOS version 2.11.
2015-06-07T12:34:07Z

Created page with "== Napalm (Voodoo4 / Voodoo5) == <spoiler text="Version 0.01 (04/30/1999)"> * Initial Version of Napalm BIOS. * Based on the Avenger BIOS version 2.11. </spoiler> <spoiler t..."
Show changes

@@ Line 1: / Line 1: @@
 == Napalm (Voodoo4 / Voodoo5) ==
 <spoiler text="Version 0.01 (04/30/1999)">
 * Initial Version of Napalm BIOS.
@@ Line 39: / Line 36: @@
 ** Created the strings sz32768K and sz65536K.
 </spoiler>
-−
 <spoiler text="Version 0.04 (05/11/1999)">
 * In the 32K ROM only, moved all the routines that are executed only during POST into the upper 32K of the ROM.  These routines will be discarded after VGA POST s executed.
@@ Line 87: / Line 84: @@
 ** In tblExtRegisters, adjusted all the 1024x768 panel CR04, CR05, CR10, and CR11 settings to center the image on the panel.
 </spoiler>
-−
 <spoiler text="Version 0.07 (05/28/1999)">
 * Modified the VESA DDC EDID read routine to read DDC from the panel when active.
@@ Line 126: / Line 123: @@
 ** Created the routine Patch32KROM to patch the ROM size when compiling a 32K ROM BIOS.
 </spoiler>
 <spoiler text="Version 0.10 (06/23/1999)">
 * Fixed bug with some VGA modes not coming up on the TV.
@@ Line 184: / Line 175: @@
 ** Renamed all the 18Xh mode numbers to 12Xh. Refer to the document MODELIST.DOC for mode numbers.
 </spoiler>
-−
 <spoiler text="Version 0.15 (07/28/1999)">
 * Redefined the usage of the scratch registers.  Made CR1E for TV data and CR1F for DFP data only. Defination of the scratch register usage is documented in "Scratch Register Usage.XLS".
@@ Line 260: / Line 251: @@
 ** Created the routine IsHalvedExtMode to return if we're a halved extende mode mode.
 </spoiler>
 <spoiler text="Version 0.21 (10/11/1999)">
 * Merged in all the Napalm 0.20 changes onto the StarTeam Napalm BIOS.
@@ Line 324: / Line 309: @@
 ** Created the null terminated strings for Chip name and BIOS Version.
 </spoiler>
-−
 <spoiler text="Version 0.24 (12/07/1999)">
 * Changed the panel CRTC timings to fix bug with setmode hanging while in a full screen DOS session in Win98.
@@ Line 354: / Line 339: @@
 ** Updated the copyright year to 2000.
 </spoiler>
 <spoiler text="Version 0.26a (01/12/2000)">
 * Changed device ID to 09h
@@ Line 381: / Line 362: @@
 ** In InitRegisters, removed the DramInit0 mask to not clear DramInit0[26]
 </spoiler>
-−
 <spoiler text="Version 0.27 (01/15/2000)">
 * Create build options for Napalm board Assy# 879, 880, 881, 882, 883 and 884.
@@ Line 430: / Line 411: @@
 ** In DDCRead, placed a PUSH CX and POP CX around call to DDCWaitClockHigh. Fixed bug with a NACK never being sent to the monitor after reading the last byte of DDC data. This enables the BIOS to read DDC data from a Compaq FP720 DFP.
 </spoiler>
 <spoiler text="Version 0.30 (02/02/2000)">
 * Changed the name of the routine I2CReadByte to DFPReadByte. This routine now uses DDC calls to read DFP EDID data. This change fixes the problem with detecting scaled and non-scaled DFPs and also scaled DFPs now fully supported. Also fixes problem with scaled DFP not coming up in VGA modes.
@@ Line 489: / Line 464: @@
 ** In InitRegisters, always set DramInit0[30]=1 to force SDRAM.
 </spoiler>
 <spoiler text="Version 1.00 (03/24/2000)">
 * Changed the default DramInit timings for 143MHz MCLK.
@@ Line 560: / Line 528: @@
 ** In OEMInitBIOS, added conditional compile code to disable the sync on the slaves chips only on 2-way and 4-way BIOSs.
 </spoiler>
-−
 <spoiler text="Version 1.05 (05/08/2000)">
 * Corrected VPD Checksum to allow for (ICT) Production BIOS programming.
@@ Line 597: / Line 565: @@
 ** Removed the build options for V5P847 and V5P874.ROM.
 </spoiler>
 <spoiler text="Version 1.10 (06/16/2000)">
 * Modified the V5P896 build option to have vidProcCfg[29:28]=00 and all other BIOS builds have vidProcCfg[29:28] = 11.
@@ Line 658: / Line 622: @@
 ** Change the memory clock for the V5P848 to 183 MHz.
 </spoiler>
-−
 <spoiler text="Version 1.15 (08/14/2000)">
 * Decreased the ampount time it took to execute video POST. For a BIOS with no copyright message, video POST when from ~191 mSec to ~155 mSec.
@@ Line 696: / Line 660: @@
 ** Made the SGRAMMODE register setting coniditional compile for Napalm and Napalm2. Fixes problem with Napalm2 SGRAMMODE setting being used on Napalm. Fixes PRS#15511.
 </spoiler>
 == Daytona (Voodoo4-2) ==
 <spoiler text="Version 1.00 (07/21/2000)">
 * Initial version of the Napalm2 BIOS
@@ Line 754: / Line 712: @@
 ** Changed DramInit0 to 0001EA9A9h. Made tRP = 2, row precharge = 3 clocks.
 </spoiler>
-−
 <spoiler text="Version 1.03 (08/14/2000)">
 * Decreased the ampount time it took to execute video POST. For a BIOS with no copyright message, video POST when from ~191 mSec to ~155 mSec.
@@ Line 823: / Line 781: @@
 ** Add strings to display total DDR or SDR memory.
 </spoiler>

@@ Line 352: / Line 352: @@
 </spoiler>
-<spoiler text="Version 0.26b (01/12/2000)">
+<spoiler text="Version 0.26b (01/13/2000)">
 * Fixed bug with TRS BIOS hanging
 * OEM.ASM
@@ Line 363: / Line 363: @@
 </spoiler>
-<spoiler text="Version 0.26c (01/12/2000)">
+<spoiler text="Version 0.26c (01/14/2000)">
 * Fixed memory sizing bug.
 * OEMPOST.ASM

@@ Line 344: / Line 344: @@
 * MAIN.ASM
 ** Updated the copyright year to 2000.
 </spoiler>

@@ Line 1: / Line 1: @@
 == Napalm (Voodoo4 / Voodoo5) ==
-=== Version 0.01 - Version 0.10 ===
+=== Version 0.01 - Version 0.09 ===
 <spoiler text="Version 0.01 (04/30/1999)">
@@ Line 125: / Line 125: @@
 ** Created the routine Patch32KROM to patch the ROM size when compiling a 32K ROM BIOS.
 </spoiler>
 <spoiler text="Version 0.10 (06/23/1999)">
@@ Line 133: / Line 135: @@
 ** In FixUpTV, Fixed bug in MISC register programming which caused Mode 7 not to display on the TV.
 </spoiler>
 <spoiler text="Version 0.11 (07/02/1999)">

@@ Line 133: / Line 133: @@
 ** In FixUpTV, Fixed bug in MISC register programming which caused Mode 7 not to display on the TV.
 </spoiler>
 <spoiler text="Version 0.11 (07/02/1999)">
@@ Line 253: / Line 255: @@
 ** Created the routine IsHalvedExtMode to return if we're a halved extende mode mode.
 </spoiler>
 <spoiler text="Version 0.21 (10/11/1999)">
@@ Line 399: / Line 403: @@
 ** In DDCRead, placed a PUSH CX and POP CX around call to DDCWaitClockHigh. Fixed bug with a NACK never being sent to the monitor after reading the last byte of DDC data. This enables the BIOS to read DDC data from a Compaq FP720 DFP.
 </spoiler>
 <spoiler text="Version 0.30 (02/02/2000)">
@@ Line 452: / Line 458: @@
 ** In InitRegisters, always set DramInit0[30]=1 to force SDRAM.
 </spoiler>
 <spoiler text="Version 1.00 (03/24/2000)">
@@ Line 553: / Line 561: @@
 ** Removed the build options for V5P847 and V5P874.ROM.
 </spoiler>
 <spoiler text="Version 1.10 (06/16/2000)">

← Older revision		Revision as of 12:54, 7 June 2015
Line 650:		Line 650:

	== Daytona (Voodoo4-2) ==		== Daytona (Voodoo4-2) ==
		+
		+	=== Version 1.00 - 1.05 ===

	<spoiler text="Version 1.00 (07/21/2000)">		<spoiler text="Version 1.00 (07/21/2000)">

← Older revision		Revision as of 12:53, 7 June 2015
Line 1:		Line 1:
	== Napalm (Voodoo4 / Voodoo5) ==		== Napalm (Voodoo4 / Voodoo5) ==
		+
		+	=== Version 0.01 - Version 0.10 ===

	<spoiler text="Version 0.01 (04/30/1999)">		<spoiler text="Version 0.01 (04/30/1999)">

@@ Line 618: / Line 618: @@
 </spoiler>
-<spoiler text="Version 1.16 (08/18/20000)">
+<spoiler text="Version 1.16 (08/18/2000)">
 * Fixed errors in BIOS default extended mode timings.
 * Fixed bug with BIOS GTF register programming routine.